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- 1. Multiple ChoiceWhich of the following bus systems is used to designate the source or destination of the data on the bus itself?control busdata busaddress bussystem bus
- 2. Multiple Choice
Internal bus also known as expansion bus, is made up of the electronic pathways that connect the different external devices, such as printer etc., to the computer.
True
False
- 3. Multiple Choice
Second-level system bus that connects the memory subsystem to the chipset and the processor is referred to as ____________.
cache bus
processor bus
standard I/O bus
memory bus
- 4. Multiple Choice
What is Backside Bus within Bus Hierarchy?
The highest-level bus that the chipset uses to send information to and from the processor.
Higher-level architectures which employ a dedicated bus for accessing the system cache
Second-level system bus that connects the memory subsystem to the chipset and the processor
High-speed input/output bus used for connecting performance-critical peripherals to the memory, chipset, and processor
- 5. Multiple ChoicePeripheral Component Interconnect (PCI) support bus mastering and burst modetruefalse
- 6. Multiple Choice
Which of below can solve issue with propagation delay? (Note: Propagation delay is the amount of time it takes for the head of the signal to travel from the sender to the receiver.)
Use Multiple buses
Minimize number of I/O module within a system
Increase number of lines for each type of bus.
- 7. Multiple Choice
Bandwidth, or throughput refers to the total amount of data that can theoretically be transferred on the bus in a given unit of time.
TRUE
FALSE
- 8. Multiple Choice
_____ is the most common and slowest expansion bus
AGP
VESA
EISA
ISA
- 9. Multiple Choice
X is faster than PCI bus. It is dedicated to the acceleration of graphics performance. What is X?
PCI express
AGP
VESA
ISA
- 10. Multiple Choice
Expansion buses provide faster transfer speeds and wider bit widths for higher data transfer rates to the many peripheral devices. The common expansion buses include PCI and PCI Express (PCIe) buses, Universal Serial Bus (USB) and FireWire.
TRUE
FALSE
- 11. Multiple Choice
A typical configuration using PCIe is illustrated in Figure below . Which of the following components is used to manage multiple PCIe streams?
PCIe endpoint
Switch
Chipset
Legacy endpoint
- 12. Multiple Choice
PCIe provides lower latency and higher data transfer rates than _______busses such as PCI and PCI-X.
serial
parallel
integrated
synchronous
- Answer choicesTagsAnswer choicesTags